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Section 14 Duty Measurement Circuit
This LSI has an on-chip duty measurement circuit which consists of an edge detection circuit,
8-bit counter, and capture register. This circuit can measure the duty by detecting edges of an
external event signal and capturing the high-level period and cycle.
Figure 14.1 shows a block diagram of the duty measurement circuit.
14.1
Features
• Selection of a counter operating signal from eight operating clocks
One of the eight operating clocks (φ, φ/2, φ/4, φ/8, φ/32, φ/2048, φ/32768, or φ/65536) can be
selected.
• Automatic duty measurement of eight external event signals for two systems
Using an edge detection circuit enables both edges of the external event signal to be detected
and capturing the counter value enables the duty to be measured. One of eight external event
signals (2-system HSYNC, 2-system CSYNC, 2-system VSYNC, HFBACK, or VFBACK)
can be selected.
• Two interrupt sources
There are two interrupt sources: Duty measurement end and overflow.
TIM8FR1A_010020020700
Rev. 1.00, 09/03, page 399 of 704
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