Table 22.3 φ φ φ φ Pin State in Each Processing State
Register Setting
DDR
PSTOP
0
X
1
0
1
1
Rev. 1.00, 09/03, page 632 of 704
Normal Operating
State
Sleep Mode
High impedance
High impedance
φ output
φ output
Fixed high
Fixed high
Software Standby
Hardware
Mode
Standby Mode
High impedance
High impedance
Fixed high
High impedance
Fixed high
High impedance