Section 13 Timer Connection; Features - Renesas H8S/2437 Hardware Manual

This LSI incorporates the timer connection with two channels. The timer connection allows
interconnection by using the combination of input pins and I/O for a 16-bit free-running timer
(FRT) and 8-bit timer (TMR1, TMRX, and TMRY). This capability can be used to implement
complex functions such as PWM decoding and clamp waveform output.
13.1

Features

• Eight input pins and four output pins, all of which can be designated for phase.
Five input pins for channel 0 and three input pins for channel 1
Positive logic is assumed for all signals used within the timer connection facility.
• An edge-detection circuit is connected to the input pins, simplifying signal input detection.
• TMRX can be used for PWM input signal decoding.
• TMRX can be used for clamp waveform generation.
• An external clock signal divided by TMR1 can be used as the FRT capture input signal.
• An internal synchronization signal can be generated using the FRT and TMRY.
• A signal generated/modified using an input signal and timer connection can be selected and
output.
This LSI incorporates the timer connection with two channels and some output pins are shared.
Figure 13.1 shows a schematic diagram of the timer connection.
TIMC0N01_010020020700

Section 13 Timer Connection

Rev. 1.00, 09/03, page 365 of 704