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• Single-Chip Mode (EXPE = 0)
TIOCB2/TCLKDS
TPU channel 2 setting
P92DDR
Pin function
TPU channel 2 setting
MD3 to MD0
IOB3 to IOB0
CCLR1, CCLR0
Output function
[Legend]
x: Don't care
Notes: 1. When TIOCB2/TCLKDS = 1, MD3 to MD0 = B'0000 or B'01xx, and IOB3 = 1, this pin
functions as the TIOCB2 input pin.
2. When TIOCB2/TCLKDS = 1 and TPSC2 to TPSC0 in TCR_0 = B'111, this pin functions
as the TCLKD input pin. When TIOCB2/TCLKDS = 1 and phase-count mode is set to
the TCR channel 2, this pin functions as the TCLKD input pin.
• P91/CS2/ExTIOCA2
When the TIOCA2S bit in PTCNT2 is set to 1, this pin can be used as the ExTIOCA2 pin.
According to operating modes, the TPU channel 2 settings by the CS2E bit, the MD3 to MD0
bits in TMDR_2, the IOA3 to IOA0 bits in TIOR_2, and the CCLR1 and CCLR0 bits in
TCR_2, and the combination of the TIOCA2S bit and the P91DDR bit, the pin function is
switched as shown below.
0
0
1
P92 input
P92
pin
output
pin
(2)
(1)
B'0000, B'01xx
B'0000
B'0001 to B'0011
B'0100
B'0101 to B'0111
B'1xxx
Output compare
output
Table below (2)
0
P92 input pin P92 output pin
ExTIOCB2 input pin*
ExTCLKD input pin*
(2)
(2)
B'0010
B'xx00
Rev. 1.00, 09/03, page 195 of 704
1
Table below (1)
1
ExTIOCB2 output
pin
1
2
(1)
B'0011
Other than B'xx00
Other than
B'10
PWM mode
2 output
(2)
B'10
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