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11.3.4 Timer Control Register (TCR) .............................................................................274
11.3.5 Timer Control/Status Register (TCSR) ................................................................277
11.3.6 Input Capture Register (TICR) ............................................................................282
11.3.7 Time Constant Register (TCORC).......................................................................282
11.3.8 Input Capture Registers R and F (TICRR and TICRF)........................................282
11.3.9 Timer Input Select Register (TISR) .....................................................................283
11.4 Operation...........................................................................................................................283
11.4.1 Pulse Output.........................................................................................................283
11.5 Operation Timing..............................................................................................................284
11.5.1 TCNT Count Timing............................................................................................284
11.5.2 Timing of CMFA and CMFB Setting at Compare-Match ...................................285
11.5.3 Timing of Timer Output at Compare-Match........................................................285
11.5.4 Timing of Counter Clear at Compare-Match .......................................................286
11.5.5 TCNT External Reset Timing ..............................................................................286
11.5.6 Timing of Overflow Flag (OVF) Setting .............................................................286
11.6 TMR0 and TMR1 Cascaded Connection ..........................................................................287
11.6.1 16-Bit Count Mode ..............................................................................................287
11.6.2 Compare-Match Count Mode ..............................................................................288
11.7 TMRY and TMRX Cascaded Connection ........................................................................288
11.7.1 16-Bit Count Mode ..............................................................................................288
11.7.2 Compare-Match Count Mode ..............................................................................289
11.7.3 Input Capture Operation.......................................................................................289
11.8 Interrupt Sources ...............................................................................................................291
11.9 Usage Notes ......................................................................................................................292
11.9.1 Conflict between TCNT Write and Clear ............................................................292
11.9.2 Conflict between TCNT Write and Increment.....................................................293
11.9.3 Conflict between TCOR Write and Compare-Match...........................................294
11.9.4 Conflict between Compare-Matches A and B......................................................294
11.9.5 Switching of Internal Clocks and TCNT Operation.............................................295
11.9.6 Mode Setting with Cascaded Connection ............................................................297
Section 12 16-Bit Timer Pulse Unit (TPU)....................................................... 299
12.1 Features .............................................................................................................................299
12.2 Input/Output Pins ..............................................................................................................303
12.3 Register Descriptions ........................................................................................................304
12.3.1 Timer Control Register (TCR) .............................................................................305
12.3.2 Timer Mode Register (TMDR) ............................................................................308
12.3.3 Timer I/O Control Register (TIOR) .....................................................................310
12.3.4 Timer Interrupt Enable Register (TIER) ..............................................................319
12.3.5 Timer Status Register (TSR)................................................................................320
12.3.6 Timer Counter (TCNT)........................................................................................323
12.3.7 Timer General Register (TGR) ............................................................................323
12.3.8 Timer Start Register (TSTR)................................................................................323
Rev.1.00, 09/03, page xv of xxxviii
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