Renesas H8S/2437 Hardware Manual page 35

Section 12 16-Bit Timer Pulse Unit (TPU)
Table 12.1 TPU Functions ......................................................................................................301
Table 12.2 Pin Configuration..................................................................................................303
Table 12.3 CCLR2 to CCLR0 (Channel 0).............................................................................306
Table 12.4 CCLR2 to CCLR0 (Channels 1 and 2) .................................................................306
Table 12.5 TPSC2 to TPSC0 (Channel 0) ..............................................................................307
Table 12.6 TPSC2 to TPSC0 (Channel 1) ..............................................................................307
Table 12.7 TPSC2 to TPSC0 (Channel 2) ..............................................................................308
Table 12.8 MD3 to MD0.........................................................................................................309
Table 12.9 TIORH_0 (Channel 0) ..........................................................................................311
Table 12.10 TIORH_0 (Channel 0) ..........................................................................................312
Table 12.11 TIORL_0 (Channel 0)...........................................................................................313
Table 12.12 TIORL_0 (Channel 0)...........................................................................................314
Table 12.13 TIOR_1 (Channel 1) .............................................................................................315
Table 12.14 TIOR_1 (Channel 1) .............................................................................................316
Table 12.15 TIOR_2 (Channel 2) .............................................................................................317
Table 12.16 TIOR_2 (Channel 2) .............................................................................................318
Table 12.17 Register Combinations in Buffer Operation..........................................................334
Table 12.18 Cascaded Combinations........................................................................................337
Table 12.19 PWM Output Registers and Output Pins ..............................................................339
Table 12.20 Clock Input Pins for Phase Counting Mode..........................................................343
Table 12.21 Up/Down-Count Conditions in Phase Counting Mode 1 ......................................344
Table 12.22 Up/Down-Count Conditions in Phase Counting Mode 2 ......................................345
Table 12.23 Up/Down-Count Conditions in Phase Counting Mode 3 ......................................346
Table 12.24 Up/Down-Count Conditions in Phase Counting Mode 4 ......................................347
Table 12.25 TPU Interrupts ......................................................................................................348
Section 13 Timer Connection
Table 13.1 Pin Configuration..................................................................................................368
Table 13.2 Synchronization Signal Connection Enable ..........................................................371
Table 13.3 HSYNCO Output Selection ..................................................................................374
Table 13.4 VSYNCO Output Selection ..................................................................................374
Table 13.5 Examples of TCR Settings ....................................................................................381
Table 13.6 Examples of TCORB (Pulse Width Threshold) Settings ......................................381
Table 13.7 Examples of TCR and TCSR Settings ..................................................................386
Table 13.8 Examples of TCR, TCSR, TCOR, and OCRDM Settings ....................................388
Table 13.9 Examples of TCR, TCSR, and TCORB Settings ..................................................391
Table 13.10 Examples of OCRAR, OCRAF, TOCR, TCORA, TCORB, TCR,
and TCSR Settings................................................................................................394
Table 13.11 HSYNCO Output Modes ......................................................................................396
Table 13.12 VSYNCO Output Modes ......................................................................................397
Rev. 1.00, 09/03, page xxxv of xxxviii