Timer Interrupt Enable Register (Tier) - Renesas H8S/2437 Hardware Manual

Renesas 16-bit single-chip microcomputer h8s family / h8s / 2600 series
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10.3.6

Timer Interrupt Enable Register (TIER)

TIER enables and disables interrupt requests.
Bit
Bit Name
Initial Value
7
ICIAE
0
6
ICIBE
0
5
ICICE
0
4
ICIDE
0
3
OCIAE
0
Rev. 1.00, 09/03, page 244 of 704
R/W
Description
R/W
Input Capture Interrupt A Enable
Selects whether to enable an interrupt request (ICIA) by
the ICFA flag when the ICFA flag in TCSR is set to 1.
0: ICIA requested by ICFA is disabled
1: ICIA requested by ICFA is enabled
R/W
Input Capture Interrupt B Enable
Selects whether to enable an interrupt request (ICIB) by
the ICFB flag when the ICFB flag in TCSR is set to 1.
0: ICIB requested by ICFB is disabled
1: ICIB requested by ICFB is enabled
R/W
Input Capture Interrupt C Enable
Selects whether to enable an interrupt request (ICIC) by
the ICFC flag when the ICFC flag in TCSR is set to 1.
0: ICIC requested by ICFC is disabled
1: ICIC requested by ICFC is enabled
R/W
Input Capture Interrupt D Enable
Selects whether to enable an interrupt request (ICID) by
the ICFD flag when the ICFD flag in TCSR is set to 1.
0: ICID requested by ICFD is disabled
1: ICID requested by ICFD is enabled
R/W
Output Compare Interrupt A Enable
Selects whether to enable an interrupt request (OCIA)
by the OCFA flag when the OCFA flag in TCSR is set to
1.
0: OCIA requested by OCFA is disabled
1: OCIA requested by OCFA is enabled

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