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12.3.6
Timer Counter (TCNT)
TCNT is a 16-bit readable/writable counter. The TPU has a total of three TCNT counters, one for
each channel. TCNT is initialized to H'0000 by a reset, and in hardware standby mode. TCNT
cannot be accessed in 8-bit units; it must always be accessed in 16-bit units.
12.3.7
Timer General Register (TGR)
TGR is a 16-bit readable/writable register with a dual function as output compare and input
capture registers. The TPU has a total of eight TGR registers, four for channel 0 and two each for
channels 1 and 2. TGRC and TGRD for channel 0 can also be designated for operation as buffer
registers. TGR is initialized to H'FFFF by a reset, and in hardware standby mode. TGR cannot be
accessed in 8-bit units; it must always be accessed in 16-bit units. TGR and buffer register
combinations are TGRA—TGRC and TGRB—TGRD.
12.3.8
Timer Start Register (TSTR)
TSTR selects TCNT operation/stop for channels 0 to 2. If the corresponding bit is set to 1, TCNT
starts counting for the channel. When setting the operating mode in TMDR or setting the count
clock in TCR, first stop the TCNT counter.
Bit
Bit Name Initial Value
7 to 3
All 0
2
CST2
0
1
CST1
0
0
CST0
0
R/W
Description
Reserved
The write value should always be 0.
R/W
Counter Start 2 to 0
R/W
Select operation or stop for TCNT.
R/W
If 0 is written to the CST bit during operation with the
TIOC pin designated for output, the counter stops but the
output compare output level for the TIOC pin is retained.
If TIOR is written to when the CST bit is cleared to 0, the
pin output level will be changed to the set initial output
value.
0: TCNTn count operation is stopped
1: TCNTn performs count operation
Rev. 1.00, 09/03, page 323 of 704
(n = 2 to 0)
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