Register Descriptions; Timer Connection Register I (Tconri) - Renesas H8S/2437 Hardware Manual

Renesas 16-bit single-chip microcomputer h8s family / h8s / 2600 series
Table of Contents

Advertisement

13.3

Register Descriptions

The timer connection has the following registers in each channel.

• Timer connection register I (TCONRI)

• Timer connection register O (TCONRO)
• Timer connection register S (TCONRS)
• Edge sense register (SEDGR)
• Timer extended control register (TECR)
13.3.1
Timer Connection Register I (TCONRI)
TCONRI controls connection between timers, the signal source for synchronization signal input,
phase inversion, etc.
Bit
Bit Name
7
SIMOD1
6
SIMOD0
5
SCONE
Initial Value
R/W
0
R/W
0
R/W
0
R/W
Description
Input Synchronization Mode Select 1, 0
Select the signal source of the IHI and IVI signals.
Mode
00: No signal
01: S-on-G mode
10: Composite mode
11: Separate mode
IHI Signal
00: HFBACKI input (setting prohibited for channel 1)
01: CSYNCI input
10: HSYNCI input
11: HSYNCI input
IVI Signal
00: VFBACKI input (setting prohibited for channel 1)
01: PDC input
10: PDC input
11: VSYNCI input
Synchronization Signal Connection Enable
Selects the signal source of the FTI input for the
FRT, TMI1 input for the TMR1, and TMIX input for
the TMRX. For details, see table 13.2.
Rev. 1.00, 09/03, page 369 of 704

Advertisement

Table of Contents
loading

Table of Contents