Renesas H8S/2437 Hardware Manual page 472

Renesas 16-bit single-chip microcomputer h8s family / h8s / 2600 series
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Bit
Bit Name
4
FER
3
PER
2
TEND
1
MPB
0
MPBT
Note:
* Only 0 can be written, to clear the flag.
Rev. 1.00, 09/03, page 434 of 704
Initial Value R/W
0
R/(W)* Framing Error
0
R/(W)* Parity Error
1
R
0
R
0
R/W
Description
[Setting condition]
When the stop bit is 0
[Clearing condition]
When 0 is written to FER after reading FER =
1
In 2-stop-bit mode, only the first stop bit is
checked.
[Setting condition]
When a parity error is detected during
reception
[Clearing condition]
When 0 is written to PER after reading PER =
1
Transmit End
[Setting conditions]
When the TE bit in SCR is 0
When TDRE = 1 at transmission of the last bit
of a 1-byte serial transmit character
[Clearing conditions]
When 0 is written to TDRE after reading TDRE
= 1
When data is written to TDR
Multiprocessor Bit
Stores the multiprocessor bit in the receive frame.
When the RE bit in SCR is cleared to 0, this bit is
not changed.
Multiprocessor Bit Transfer
Sets the multiprocessor bit to be added to the
transmit frame.

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