Renesas H8S/2437 Hardware Manual page 411

Bit Bit Name
3 HOINV
2 VOINV
1 CLOINV
0 CBOINV
Initial Value R/W
0 R/W
0 R/W
0 R/W
0 R/W
Description
Horizontal Synchronization Signal Output Inversion
Selects the signal output from the HSYNCO with the
settings of the HS2, HS1, and HS0 bits in TECR.
See table 13.3.
Vertical Synchronization Signal Output Inversion
Selects the signal output from the VSYNCO with the
setting of the VS0 bit in TECR. See table 13.4.
Output Synchronization Signal Inversion
Selects inversion of the output phase of the clamp
waveform (CLAMPO) and blanking waveform
(CBLANK) in channel 0.
These bits are reserved in channel 1. The initial
value should not be changed.
•
CLOINV
0: The CLO signal (CL1, CL2, CL3, or CL4 signal) is
used directly as the CLAMPO output
1: The CLO signal (CL1, CL2, CL3, or CL4 signal) is
inverted before use as the CLAMPO output
•
CBOINV
0: The CBLANK signal is used directly as the
CBLANK output
1: The CBLANK signal is inverted before use as the
CBLANK output
Rev. 1.00, 09/03, page 373 of 704