Port A; Port A Data Direction Register (Paddr) - Renesas H8S/2437 Hardware Manual

7.11

Port A

Port A is an 8-bit I/O port. Port A pins also function as bus control output pins, SCI_3 and SCI_4
I/O pins, TMX_0, TMY_0, TM0_0, and PWM output pins, and FRT_0 and timer connection I/O
pins.
Port A has the following registers. For details on the port function control register, refer to section
7.10.4, Port Function Control Register (PFCR).

• Port A data direction register (PADDR)

• Port A data register (PADR)
• Port A register (PORTA)
• Port function control register (PFCR)
7.11.1 Port A Data Direction Register (PADDR)
The individual bits in PADDR specify input or output for the pins of port A. The read value is
undefined.
Bit Bit Name
7 PA7DDR
6 PA6DDR
5 PA5DDR
4 PA4DDR
3 PA3DDR
2 PA2DDR
1 PA1DDR
0 PA0DDR
Rev. 1.00, 09/03, page 198 of 704
Initial Value R/W
0 W
0 W
0 W
0 W
0 W
0 W
0 W
0 W
Description
While a general I/O port function is selected, the
corresponding port A pin is an output port when a
PADDR bit is set to 1, and an input port when
cleared to 0.