Timer Connection Register O (Tconro) - Renesas H8S/2437 Hardware Manual

Renesas 16-bit single-chip microcomputer h8s family / h8s / 2600 series
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13.3.2

Timer Connection Register O (TCONRO)

TCONRO controls output signal output, phase inversion, etc.
Bit
Bit Name
7
HOE
6
VOE
5
CLOE
4
CBOE
Rev. 1.00, 09/03, page 372 of 704
Initial Value
R/W
0
R/W
0
R/W
0
R/W
0
R/W
Description
Output Enable
Control enabling/disabling of output of the horizontal
synchronization signal (HSYNCO), vertical
synchronization signal (VSYNCO), and clamp
waveform (CLAMPO) and blanking waveform
(CBLANK) in channel 0.
These bits are reserved in channel 1. The initial value
should not be changed.
HOE
0: The PB1/TMO1_0/HSYNCO pin functions as the
PB1/TMO1_0 pin
1: The PB1/TMO1_0/HSYNCO pin functions as the
HSYNCO pin
VOE
0: The PB0/FTOA_0/VSYNCO pin functions as the
PB0/FTOA_0 pin
1: The PB0/FTOA_0/VSYNCO pin functions as the
VSYNCO pin
CLOE
0: The PA4/FTIC_0/CLAMPO pin functions as the
PA4/FTIC_0 pin
1: The PA4/FTIC_0/CLAMPO pin functions as the
CLAMPO pin
CBOE
0: The PA3/FTOB_0/CBLANK pin functions as the
PA3/FTOB_0 pin
1: The PA3/FTOB_0/CBLANK pin functions as the
CBLANK pin

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