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(c) Flash Pass/Fail Parameter (FPFR: General Register R0L of CPU)
FPFR indicates the return value of the program processing result.
Initial
Value
Bit
Bit Name
7
6
MD
5
EE
4
FK
R/W
Description
Unused
Returns 0.
R/W
Error Detect for Programming Mode Related Setting
Returns the check result that a high level signal is input
to the FWE pin and the error protection state is not
entered. When the low level signal is input to the FWE
pin or the error protection state is entered, 1 is written to
this bit. The state can be confirmed with the FWE and
FLER bits in FCCS. For conditions to enter the error
protection state, see section 20.5.3, Error Protection.
0: FWE and FLER settings are normal (FWE = 1,
FLER = 0)
1: Programming cannot be performed (FWE = 0 or
FLER = 1)
R/W
Error Detect During Programming Execution
1 is returned to this bit when the specified data could not
be written because the user MAT was not erased. If this
bit is set to 1, there is a high possibility that the user
MAT is partially reprogrammed. In this case, after
removing the error source, erase the user MAT.
If FMATS is set to H'AA and the user boot MAT is
selected, an error occurs when programming is
performed. In this case, both the user MAT and user
boot MAT are not reprogrammed. Programming of the
user boot MAT should be performed in boot mode or
programmer mode.
0: Programming has ended normally
1: Programming has ended abnormally and
programming result is not guaranteed
R/W
Error Detect for Flash Key Register
Returns the check result of the value of FKEY before the
start of the programming processing.
0: FKEY setting is normal (FKEY = H'5A)
1: FKEY setting error (FKEY = value other than H'5A)
Rev. 1.00, 09/03, page 547 of 704
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