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5.6
Interrupt Control Modes and Interrupt Operation .............................................................81
5.6.1
Interrupt Control Mode 0 .....................................................................................81
5.6.2
Interrupt Control Mode 2 .....................................................................................83
5.6.3
Interrupt Exception Handling Sequence ..............................................................85
5.6.4
Interrupt Response Times ....................................................................................87
5.7
Usage Notes ......................................................................................................................88
5.7.1
Contention between Interrupt Generation and Disabling.....................................88
5.7.2
Instructions that Disable Interrupts ......................................................................89
5.7.3
Times when Interrupts are Disabled ....................................................................89
5.7.4
Interrupts during Execution of EEPMOV Instruction..........................................89
IRQ Pin Select......................................................................................................89
5.7.5
5.7.6
Note on IRQ Status Register (ISR) ......................................................................90
Section 6 Bus Controller (BSC)........................................................................ 91
6.1
Features .............................................................................................................................91
6.2
Input/Output Pins ..............................................................................................................93
6.3
Register Descriptions ........................................................................................................94
6.3.1
Bus Control Register (BCR) ................................................................................94
6.3.2
Area Control Register (BCRA)............................................................................95
6.4
Bus Control .......................................................................................................................97
6.4.1
Bus Specifications................................................................................................97
6.4.2
External Address Area .........................................................................................100
6.4.3
Chip Select Signals ..............................................................................................100
6.4.4
Address Strobe/Hold Signal.................................................................................101
6.4.5
Address Output ....................................................................................................101
6.5
Bus Interface .....................................................................................................................102
6.5.1
Data Size and Data Alignment.............................................................................102
6.5.2
Valid Strobes........................................................................................................104
6.5.3
Basic Operation Timing in Normal Extended Mode............................................105
6.5.4
Basic Operation Timing in Multiplex Extended Mode ........................................113
6.5.5
Wait Control ........................................................................................................125
6.6
Idle Cycle ..........................................................................................................................128
Section 7 I/O Ports ............................................................................................ 131
7.1
Port 0.................................................................................................................................137
7.1.1
Port 0 Register (PORT0)......................................................................................137
7.1.2
Pin Functions .......................................................................................................137
7.2
Port 1.................................................................................................................................139
7.2.1
Port 1 Data Direction Register (P1DDR).............................................................139
7.2.2
Port 1 Data Register (P1DR)................................................................................140
7.2.3
Port 1 Register (PORT1)......................................................................................140
7.2.4
Port 1 Pull-Up MOS Control Register (P1PCR) ..................................................141
7.2.5
Pin Functions .......................................................................................................141
Rev.1.00, 09/03, page xi of xxxviii
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