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Section 20 Flash Memory (0.18-µm F-ZTAT Version)
The flash memory has the following features. Figure 20.1 shows a block diagram of the flash
memory.
20.1
Features
• Size
Product Classification
H8S/2437
HD64F2437
• Two flash-memory MATs according to LSI initiation mode
The on-chip flash memory has two memory spaces in the same address space (hereafter
referred to as memory MATs). The mode setting in the initiation determines which memory
MAT is initiated first. The MAT can be switched by using the bank-switching method after
initiation.
The user memory MAT is initiated at a power-on reset in user mode: 256 kbytes
The user boot memory MAT is initiated at a power-on reset in user boot mode: 8 kbytes
• Programming/erasing interface by the download of on-chip program
This LSI has a dedicated programming/erasing program. After downloading this program to
the on-chip RAM, programming/erasing can be performed by setting the argument parameter.
• Programming/erasing time
The flash memory programming time is 3 ms (typ.) in 128-byte simultaneous programming
and approximately 25 µs per byte. The erasing time is 1000 ms (typ.) per 64-kbyte block.
• Number of programming
The number of flash memory programming can be up to 100 times at the minimum. (The value
ranged from 1 to 100 is guaranteed.)
• Three on-board programming modes
Boot mode:
This mode is a program mode that uses an on-chip SCI interface. The user MAT and user boot
MAT can be programmed. This mode can automatically adjust the bit rate between the host
and this LSI.
User program mode:
The user MAT can be programmed by using any interface.
User boot mode:
The user boot program of any interface can be created and the user MAT can be programmed.
ROM1250A_000020021100
ROM Size
ROM Address
256 kbytes
H'000000 to H'03FFFF
Rev. 1.00, 09/03, page 525 of 704
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