Figure 12.18 Example Of Buffer Operation Setting Procedure; Figure 12.19 Example Of Buffer Operation (1) - Renesas H8S/2437 Hardware Manual

Buffer operation
Select TGR function
Set buffer operation
<Buffer operation>

Figure 12.18 Example of Buffer Operation Setting Procedure

Examples of Buffer Operation:
• When TGR is Output Compare Register
Figure 12.19 shows an operation example in which PWM mode 1 has been designated for
channel 0, and buffer operation has been designated for TGRA and TGRC. The settings used
in this example are TCNT clearing by compare match B, 1 output at compare match A, and 0
output at compare match B.
As buffer operation has been set, when compare match A occurs the output changes and the
value in buffer register TGRC is simultaneously transferred to timer general register TGRA.
This operation is repeated each time compare match A occurs.
For details on PWM modes, see section 12.5.5, PWM Modes.
TCNT value
TGRB_0
TGRA_0
H'0000
H'0200
TGRC_0
Transfer
TGRA_0
TIOCA
[1]
[2]
[3]
Start counting
H'0200
H'0450
H'0200

Figure 12.19 Example of Buffer Operation (1)

[1] Designate TGR as an input capture register or
output compare register by means of TIOR.
[2]
Designate TGR for buffer operation with bits
BFA and BFB in TMDR.
[3]
Set the CST bit in TSTR to 1 to start the count
operation.
H'0450
H'0520
H'0450
Rev. 1.00, 09/03, page 335 of 704
H'0520
Time