Renesas H8S/2437 Hardware Manual page 578

Renesas 16-bit single-chip microcomputer h8s family / h8s / 2600 series
Table of Contents

Advertisement

(6) Flash Transfer Destination Address Register (FTDAR)
FTDAR specifies the on-chip RAM address which is download destination of an on-chip program.
This register must be set before setting the SCO bit in FCCS to 1.
Initial
Bit
Bit Name
Value
7
TDER
0
6
TDA6
0
5
TDA5
0
4
TDA4
0
3
TDA3
0
2
TDA2
0
1
TDA1
0
0
TDA0
0
Rev. 1.00, 09/03, page 540 of 704
R/W
Description
R/W
Transfer Destination Address Setting Error
This bit is set to 1 when the address specified by bits
TDA6 to TDA0, which is the start address to download
an on-chip program, is over the range. Whether or not
the range specified by bits TDA6 to TDA0 is within the
range of H'00 to H'03 is determined when an on-chip
program is downloaded by setting the SCO bit in FCCS
to 1. Make sure that this bit is cleared to 0 before setting
the SCO bit to 1 and the value specified by bits TDA6 to
TDA0 is within the range of H'00 to H'03.
0:
The value specified by bits TDA6 to TDA0 is within
the range.
1:
The value specified by bits TDA6 to TDA0 is over
the range (H'04 to H'FF) and the download is
stopped.
R/W
Transfer Destination Address
R/W
Specify the start address to download an on-chip
R/W
program. H'00 to H'03 can be specified as the start
R/W
address in the on-chip RAM space.
R/W
H'00: H'FF6000 is specified as a start address to
R/W
download an on-chip program.
R/W
H'01: H'FF7000 is specified as a start address to
download an on-chip program.
H'02: H'FF8000 is specified as a start address to
download an on-chip program.
H'03: H'FF9000 is specified as a start address to
download an on-chip program.
H'04 to H'FF: Setting prohibited. Specifying these
values sets the TDER bit to 1 and stops
the download.

Advertisement

Table of Contents
loading

Table of Contents