4.7
Stack Status after Exception Handling
Figure 4.2 shows the stack after completion of trap instruction exception handling and interrupt
exception handling.
(a) Normal Modes
(b) Advanced Modes
Notes: 1.
2
*
SP
CCR
CCR*
PC (16 bits)
Interrupt control mode 0
SP
CCR
PC (24 bits)
Interrupt control mode 0
Ignored on return.
2.
Normal modes are not available in this LSI.
Figure 4.2 Stack Status after Exception Handling
SP
1
Interrupt control mode 2
SP
Interrupt control mode 2
Rev. 1.00, 09/03, page 63 of 704
EXR
1
Reserved*
CCR
1
CCR*
PC (16 bits)
EXR
1
Reserved*
CCR
PC (24 bits)