Figure 24.3 System Clock Timing; Figure 24.4 Oscillation Stabilization Timing; Table 24.4 Clock Timing - Renesas H8S/2437 Hardware Manual

Table 24.4 Clock Timing

Condition: V = 3.0 V to 3.6 V, V
CC
Item
Clock cycle time
Clock high pulse width
Clock low pulse width
Clock rise time
Clock fall time
Reset oscillation
stabilization (crystal)
Software standby
oscillation stabilization time
(crystal)
External clock output
stabilization delay time
EXTAL
VCC
φ
Rev. 1.00, 09/03, page 674 of 704
= 0 V, φ = 5 MHz to 20 MHz
SS
Symbol Min.
t 50
cyc
t 10
CH
t 10
CL

t
Cr

t
Cf
t 10
OSC1
t 8
OSC2
t 500
DEXT
t

Figure 24.3 System Clock Timing

t
DEXT
t
OSC1

Figure 24.4 Oscillation Stabilization Timing

Max.
200


8
8



t cyc
t
CH Cf
t
t
Cr
CL
Unit Reference
ns Figure 24.3
ms Figure 24.4
Figure 24.5
µs Figure 24.4
t
DEXT
t
OSC1