Software Standby Release Irq Enable Register (Ssier); Interrupt Sources; External Interrupt Sources - Renesas H8S/2437 Hardware Manual

Renesas 16-bit single-chip microcomputer h8s family / h8s / 2600 series
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5.3.6

Software Standby Release IRQ Enable Register (SSIER)

SSIER selects the IRQ pins used to recover from the software standby state.
Bit
Bit Name
7
SSI7
6
SSI6
5
SSI5
4
SSI4
3
SSI3
2
SSI2
1
SSI1
0
SSI0
5.4

Interrupt Sources

5.4.1

External Interrupt Sources

There are nine external interrupts: NMI and IRQ7 to IRQ0. These interrupts can be used to restore
the chip from software standby mode.
NMI Interrupt: Nonmaskable interrupt request (NMI) is the highest-priority interrupt, and is
always accepted by the CPU regardless of the interrupt control mode or the status of the CPU
interrupt mask bits. The NMIEG bit in INTCR can be used to select whether an interrupt is
requested at a rising edge or a falling edge on the NMI pin.
IRQ7 to IRQ0 Interrupts: Interrupts IRQ7 to IRQ0 are requested by an input signal at pins IRQ7
to IRQ0. Interrupts IRQ7 to IRQ0 have the following features.
• Using ISCR, it is possible to select whether an interrupt is generated by a low level, falling
edge, rising edge, or both edges, at pins IRQ7 to IRQ0.
• Enabling or disabling of interrupt requests IRQ7 to IRQ0 can be selected with IER.
• The interrupt priority level can be set with IPR.
• The status of interrupt requests IRQ7 to IRQ0 is indicated in ISR. ISR flags can be cleared to 0
by software.
When IRQ7 to IRQ0 interrupt requests occur at low level of IRQn, the corresponding IRQ should
be held low until an interrupt handling starts. Then the corresponding IRQ should be set to high in
the interrupt handling routine and clear the IRQnF bit (n = 0 to 7) in ISR to 0. Interrupts may not
be executed when the corresponding IRQ is set to high before the interrupt handling starts.
Initial Value R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
1
R/W
1
R/W
1
R/W
Description
Software Standby Release IRQ Setting
These bits select the IRQn pins used to recover from
the software standby state.
0: IRQn requests are not sampled in the software
standby state (Initial value when n = 7 to 3).
1: When IRQn request occurs in the software standby
state, the chip recovers from the software standby
state after the elapse of the oscillation settling time
(Initial value when n = 2 to 0).
Rev. 1.00, 09/03, page 75 of 704

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