Input/Output Pins; Register Descriptions - Renesas H8S/2437 Hardware Manual

9.2

Input/Output Pins

Table 9.1 lists the PWMX (D/A) input and output pins.
Table 9.1 Pin Configuration
Name
PWMX output pin 0
PWMX output pin 1
9.3

Register Descriptions

The PWMX (D/A) has the following registers.
• PWMX (D/A) counters H and L (DACNTH and DACNTL)
• PWMX (D/A) data register A (DADRA)
• PWMX (D/A) data register B (DADRB)
• PWMX (D/A) control register (DACR)
• Peripheral clock select register (PCSR)
Note: The same addresses are shared by DADRA and DACR, and by DADRB and DACNT.
Switching is performed by the REGS bit in DACNT or DADRB.
Rev. 1.00, 09/03, page 226 of 704
Symbol I/O
PWX0 Output
PWX1 Output
Function
PWM output of PWMX channel A
PWM output of PWMX channel B