A/D Converter Activation - Renesas H8S/2437 Hardware Manual

Renesas 16-bit single-chip microcomputer h8s family / h8s / 2600 series
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Input Capture/Compare Match Interrupt:
An interrupt is requested if the TGIE bit in TIER is set to 1 when the TGF flag in TSR is set to 1
by the occurrence of a TGR input capture/compare match on a particular channel. The interrupt
request is cleared by clearing the TGF flag to 0. The TPU has a total of eight input
capture/compare match interrupts, four for channel 0, and two each for channels 1 and 2.
Overflow Interrupt:
An interrupt is requested if the TCIEV bit in TIER is set to 1 when the TCFV flag in TSR is set to
1 by the occurrence of TCNT overflow on a channel. The interrupt request is cleared by clearing
the TCFV flag to 0. The TPU has a total of three overflow interrupts, one for each channel.
Underflow Interrupt:
An interrupt is requested if the TCIEU bit in TIER is set to 1 when the TCFU flag in TSR is set to
1 by the occurrence of TCNT underflow on a channel. The interrupt request is cleared by clearing
the TCFU flag to 0. The TPU has a total of two underflow interrupts, one each for channels 1 and
2.
12.6.2

A/D Converter Activation

The A/D converter can be activated by the TGRA input capture/compare match for a channel.
If the TTGE bit in TIER is set to 1 when the TGFA flag in TSR is set to 1 by the occurrence of a
TGRA input capture/compare match on a particular channel, a request to start A/D conversion is
sent to the A/D converter. If the TPU conversion start trigger has been selected on the A/D
converter side at this time, A/D conversion is started.
In the TPU, a total of three TGRA input capture/compare match interrupts can be used as A/D
conversion start sources, one for each channel.
Rev. 1.00, 09/03, page 349 of 704

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