Renesas H8S/2437 Hardware Manual page 37

Table 20.6 System Clock Frequency for Automatic-Bit-Rate Adjustment.............................553
Table 20.7 Executable MAT ...................................................................................................569
Table 20.8 (1) Usable Area for Programming in User Program Mode.....................................570
Table 20.8 (2) Usable Area for Erasure in User Program Mode ..............................................572
Table 20.8 (3) Usable Area for Programming in User Boot Mode...........................................574
Table 20.8 (4) Usable Area for Erasure in User Boot Mode ....................................................576
Table 20.9 Hardware Protection .............................................................................................578
Table 20.10 Software Protection...............................................................................................579
Table 20.11 Inquiry/Selection Commands................................................................................587
Table 20.12 Programming/Erasing Commands ........................................................................598
Table 20.13 Status Codes..........................................................................................................606
Table 20.14 Error Codes ...........................................................................................................607
Section 21 Clock Pulse Generator
Table 21.1 Damping Resistor Values......................................................................................614
Table 21.2 Crystal Resonator Parameters ...............................................................................614
Table 21.3 External Clock Input Conditions...........................................................................615
Table 21.4 Output Stabilization Delay Time for External Clock ............................................616
Section 22 Power-Down Modes
Table 22.1 Operating Modes and Internal States of LSI .........................................................620
Table 22.2 Oscillation Stabilization Time Settings.................................................................628
φ Pin State in Each Processing State .....................................................................632
Table 22.3
Section 24 Electrical Characteristics
Table 24.1 Absolute Maximum Ratings .................................................................................669
Table 24.2 DC Characteristics ................................................................................................670
Table 24.3 Permissible Output Currents .................................................................................672
Table 24.4 Clock Timing ........................................................................................................674
Table 24.5 Control Signal Timing ..........................................................................................675
Table 24.6 Bus Timing (Normal Extension)...........................................................................677
Table 24.7 Bus Timing (Multiplex Extension) .......................................................................681
Table 24.8 Timing of On-Chip Peripheral Modules ...............................................................685
2
Table 24.9 I C Bus Interface Timing ......................................................................................689
Table 24.10 A/D Conversion Characteristics
(AN15 to AN0 Input: 134/266-State Conversion)................................................691
Table 24.11 Flash Memory Characteristics...............................................................................692
Appendix
Table A.1 I/O Port States in Each Pin State...........................................................................695
Rev. 1.00, 09/03, page xxxvii of xxxviii