Serial Interface Mode Register (Scmr) - Renesas H8S/2437 Hardware Manual

Renesas 16-bit single-chip microcomputer h8s family / h8s / 2600 series
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16.3.8

Serial Interface Mode Register (SCMR)

SCMR is a register that selects the SCI functions.
Bit
Bit Name
7 to 4
3
SDIR
2
SINV
1
0
Initial Value
R/W
All 1
R
0
R/W
0
R/W
1
R
0
R/W
Description
Reserved
These bits are always read as 1 and cannot
be modified.
Data Transfer Direction
Selects the serial/parallel conversion format.
0: TDR contents are transmitted with LSB-
first.
Stores receive data as LSB first in RDR.
1: TDR contents are transmitted with MSB-
first.
Stores receive data as MSB first in RDR.
The SDIR bit is valid only when the 8-bit data
format is used for transmission/reception;
when the 7-bit data format is used, data is
always transmitted/received with LSB-first.
Data Invert
Specifies inversion of the data logic level. The
SINV bit does not affect the logic level of the
parity bit. When the parity bit is inverted, invert
the O/E bit in SMR.
0: TDR contents are transmitted as they are.
Receive data is stored as it is in RDR.
1: TDR contents are inverted before being
transmitted. Receive data is stored in
inverted form in RDR.
Reserved
This bit is always read as 1 and cannot be
modified.
Reserved
The initial value should not be changed.
Rev. 1.00, 09/03, page 435 of 704

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