External Trigger Input Timing; Table 18.3 A/D Conversion Time (Single Mode); Table 18.4 A/D Conversion Time (Scan Mode) - Renesas H8S/2437 Hardware Manual

Table 18.3 A/D Conversion Time (Single Mode)

Item Symbol Min. Typ. Max.
A/D t
D
conversion
start delay
time
Input t
SPL
sampling
time
A/D t
CONV
conversion
time
Note: Values in the table are the number of states.

Table 18.4 A/D Conversion Time (Scan Mode)

CKS1
0
1
18.4.4

External Trigger Input Timing

A/D conversion can be started by an external trigger input. When the TRGS1 and TRGS0 bits in
ADCR are set to 11, an external trigger input is enabled at the ADTRG pin. A falling edge at the
ADTRG pin sets the ADST bit in ADCSR to 1, starting A/D conversion. Other operations, in both
single and scan modes, are the same as when the ADST bit has been set to 1 by software. Figure
18.3 shows the timing.
Rev. 1.00, 09/03, page 516 of 704
CKS1 = 0
CKS0 = 0
Min. Typ. Max. Min. Typ. Max. Min. Typ. Max.
18 — 33 10
— 127 — —
515 — 530 259 —
CKS0
0
1
0
1
CKS0 = 1 CKS0 = 0
— 17 6
63 — —
266 131 —
Conversion Time (State)
512 (Fixed)
256 (Fixed)
128 (Fixed)
64 (Fixed)
CKS1 = 1
CKS0 = 1
— 9 4 —
31 — — 15
134 67 —
5
—
68