Renesas H8S/2437 Hardware Manual page 14

9.4 Bus Master Interface ......................................................................................................... 231
9.5 Operation .......................................................................................................................... 233
Section 10 16-Bit Free-Running Timer (FRT)..................................................239
10.1 Features............................................................................................................................. 239
10.2 Input/Output Pins .............................................................................................................. 241
10.3 Register Descriptions ........................................................................................................ 241
10.3.1 Free-Running Counter (FRC) .............................................................................. 242
10.3.2 Output Compare Registers A and B (OCRA and OCRB) ................................... 242
10.3.3 Input Capture Registers A to D (ICRA to ICRD) ................................................ 242
10.3.4 Output Compare Registers AR and AF (OCRAR and OCRAF) ......................... 243
10.3.5 Output Compare Register DM (OCRDM) ........................................................... 243
10.3.6 Timer Interrupt Enable Register (TIER) .............................................................. 244
10.3.7 Timer Control/Status Register (TCSR)................................................................ 245
10.3.8 Timer Control Register (TCR)............................................................................. 248
10.3.9 Timer Output Compare Control Register (TOCR) .............................................. 249
10.4 Operation .......................................................................................................................... 251
10.4.1 Pulse Output......................................................................................................... 251
10.5 Operation Timing.............................................................................................................. 252
10.5.1 FRC Increment Timing ........................................................................................ 252
10.5.2 Output Compare Output Timing .......................................................................... 253
10.5.3 FRC Clear Timing ............................................................................................... 253
10.5.4 Input Capture Input Timing ................................................................................. 254
10.5.5 Buffered Input Capture Input Timing .................................................................. 255
10.5.6 Timing of Input Capture Flag Setting .................................................................. 256
10.5.7 Timing of Output Compare Flag Setting ............................................................. 257
10.5.8 Timing of Overflow Flag Setting......................................................................... 257
10.5.9 Automatic Addition Timing................................................................................. 258
10.5.10 Mask Signal Generation Timing .......................................................................... 258
10.6 Interrupt Sources............................................................................................................... 260
10.7 Usage Notes ...................................................................................................................... 261
10.7.1 Conflict between FRC Write and Clear ............................................................... 261
10.7.2 Conflict between FRC Write and Increment........................................................ 262
10.7.3 Conflict between OCR Write and Compare-Match ............................................. 263
10.7.4 Switching of Internal Clock and FRC Operation ................................................. 264
Section 11 8-Bit Timer (TMR)..........................................................................267
11.1 Features............................................................................................................................. 267
11.2 Input/Output Pins .............................................................................................................. 270
11.3 Register Descriptions ........................................................................................................ 271
11.3.1 Timer Counter (TCNT)........................................................................................ 273
11.3.2 Time Constant Register A (TCORA)................................................................... 273
11.3.3 Time Constant Register B (TCORB) ................................................................... 273
Rev.1.00, 09/03, page xiv of xxxviii