Usage Notes; Conflict Between Twcnt Write And Increment; Write To Start Bit During Free-Running Counter Operation; Figure 14.10 Twcnt Write-Increment Conflict - Renesas H8S/2437 Hardware Manual

14.7

Usage Notes

14.7.1

Conflict between TWCNT Write and Increment

If a TWCNT increment pulse is generated during the T
figure 14.10, the write takes priority and TWCNT is not incremented.
Address
Internal write signal
Counter input clock
TWCNT
14.7.2

Write to START Bit during Free-Running Counter Operation

If 1 is written to the START bit in TWCR2 while the FRC bit in TWCR1 is 1 as shown in figure
14.11, duty measurement is ignored and the START bit is cleared to 0.
FRC bit
TWCR2
write signal
START bit
START bit
clear signal

Figure 14.11 Write to START Bit during Free-Running Counter Operation

N

Figure 14.10 TWCNT Write-Increment Conflict

state of a TWCNT write cycle as shown in
2
TWCNT write cycle by CPU
T T
1 2
TWCNT address
Counter write data
Rev. 1.00, 09/03, page 411 of 704
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