Port 1 Data Register (P1Dr); Port 1 Register (Port1) - Renesas H8S/2437 Hardware Manual

7.2.2

Port 1 Data Register (P1DR)

P1DR stores output data for port 1.
Bit Bit Name
7 P17DR
6 P16DR
5 P15DR
4 P14DR
3 P13DR
2 P12DR
1 P11DR
0 P10DR
7.2.3

Port 1 Register (PORT1)

PORT1 reflects the pin state in port 1 and cannot be modified.
Bit Bit Name
7 P17
6 P16
5 P15
4 P14
3 P13
2 P12
1 P11
0 P10
Note: * Determined by the states of the P17 to P10 pins.
Rev. 1.00, 09/03, page 140 of 704
Initial Value R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
Initial Value R/W
*
R
*
R
*
R
*
R
*
R
*
R
*
R
*
R
Description
P1DR stores output data for the port 1 pins that are
used as the general output ports.
Description
When this register is read, the bit that is set in
P1DDR is read as the value of P1DR. The bit that is
cleared in P1DDR is read as the pin state.