Figure 17.1 Block Diagram Of I - Renesas H8S/2437 Hardware Manual

Output
SCL
control
Noise canceler
Output
SDA
control
Noise canceler
[Legend]
ICCRA:
ICCRB:
ICMR :
ICSR :
ICIER :
ICDRT :
ICDRR :
ICDRS :
SAR :
Rev. 1.00, 09/03, page 476 of 704
Transmission/
control circuit
Bus state
determination circuit
Arbitration
determination circuit
2
I C bus control register A
2
I C bus control register B
2
I C mode register
2
I C status register
2
I C interrupt enable register
2
I C transmit data register
2
I C receive data register
2
I C bus shift register
Slave address register

Figure 17.1 Block Diagram of I

reception
ICDRT
ICDRS
ICDRR
ICIER
2
C Bus Interface 3
Transfer clock
generation
circuit
ICCRA
ICCRB
ICMR
SAR
Address
comparator
ICSR
Interrupt
Interrupt request
generator