Renesas H8S/2437 Hardware Manual page 28

Figure 14.9 Set Timing for OVF Flag ........................................................................................ 410
Figure 14.10 TWCNT Write-Increment Conflict ....................................................................... 411
Figure 14.11 Write to START Bit during Free-Running Counter Operation ............................. 411
Section 15 Watchdog Timer (WDT)
Figure 15.1 Block Diagram of WDT .......................................................................................... 417
Figure 15.2 Watchdog Timer Mode (RST/NMI = 1) Operation................................................. 420
Figure 15.3 Interval Timer Mode Operation............................................................................... 421
Figure 15.4 OVF Flag Set Timing .............................................................................................. 421
Figure 15.5 Internal Reset Signal Generation Timing ................................................................ 422
Figure 15.6 Writing to TCNT and TCSR ................................................................................... 423
Figure 15.7 Conflict between TCNT Write and Increment ........................................................ 424
Section 16 Serial Communication Interface (SCI)
Figure 16.1 Block Diagram of SCI ............................................................................................. 426
Figure 16.2 Data Format in Asynchronous Communication (Example with 8-Bit Data, Parity,
Two Stop Bits) ........................................................................................................ 442
Figure 16.3 Receive Data Sampling Timing in Asynchronous Mode ........................................ 444
Figure 16.4 Relation between Output Clock and Transmit Data Phase
(Asynchronous Mode)............................................................................................. 445
Figure 16.5 Sample SCI Initialization Flowchart ....................................................................... 446
Figure 16.6 Example of Operation in Transmission in Asynchronous Mode
(Example with 8-Bit Data, Parity, One Stop Bit) .................................................... 447
Figure 16.7 Sample Serial Transmission Flowchart ................................................................... 448
Figure 16.8 Example of SCI Operation in Reception
(Example with 8-Bit Data, Parity, One Stop Bit) .................................................... 449
Figure 16.9 Sample Serial Reception Flowchart (1)................................................................... 451
Figure 16.9 Sample Serial Reception Flowchart (2)................................................................... 452
Figure 16.10 Example of Communication Using Multiprocessor Format
(Transmission of Data H'AA to Receiving Station A) .......................................... 454
Figure 16.11 Sample Multiprocessor Serial Transmission Flowchart ........................................ 455
Figure 16.12 Example of SCI Operation in Reception
(Example with 8-Bit Data, Multiprocessor Bit, One Stop Bit).............................. 456
Figure 16.13 Sample Multiprocessor Serial Reception Flowchart (1)........................................ 457
Figure 16.13 Sample Multiprocessor Serial Reception Flowchart (2)........................................ 458
Figure 16.14 Data Format in Clocked Synchronous Communication (LSB-First)..................... 459
Figure 16.15 Sample SCI Initialization Flowchart ..................................................................... 460
Figure 16.16 Sample SCI Transmission Operation in Clocked Synchronous Mode .................. 461
Figure 16.17 Sample Serial Transmission Flowchart ................................................................. 462
Figure 16.18 Example of SCI Receive Operation in Clocked Synchronous Mode .................... 463
Figure 16.19 Sample Serial Reception Flowchart ...................................................................... 464
Figure 16.20 Sample Flowchart of Simultaneous Serial Transmission and Reception............... 466
Figure 16.21 Sample Flowchart for Mode Transition during Transmission ............................... 470
Figure 16.22 Pin States during Transmission in Asynchronous Mode (Internal Clock)............. 471
Rev. 1.00, 09/03, page xxviii of xxxviii