Table of Contents
Advertisement
(b) Flash Pass/Fail Parameter (FPFR: General Register R0L of CPU)
FPFR indicates a return value of the erasing processing result.
Initial
Value
Bit
Bit Name
7
6
MD
5
EE
4
FK
3
EB
Rev. 1.00, 09/03, page 550 of 704
R/W
Description
Unused
Returns 0.
R/W
Error Detect for Erasing Mode Related Setting
Returns the check result that a high level signal is input
to the FWE pin and the error protection state is not
entered. When the low level signal is input to the FWE
pin or the error protection state is entered, 1 is written to
this bit. The state can be confirmed with the FWE and
FLER bits in FCCS. For conditions to enter the error
protection state, see section 20.5.3, Error Protection.
0: FWE and FLER settings are normal (FWE = 1,
FLER = 0)
1: Erasing cannot be performed (FWE = 0 or FLER =
1)
R/W
Erasure Execution Error Detect
1 is returned to this bit when the user MAT could not be
erased or when flash-memory related register settings
are partially changed. If this bit is set to 1, there is a high
possibility that the user MAT is partially erased. In this
case, after removing the error source, erase the user
MAT. If FMATS is set to H'AA and the user boot MAT is
selected, an error occurs when erasure is performed. In
this case, both the user MAT and user boot MAT are not
erased. Erasing of the user boot MAT should be
performed in boot mode or programmer mode.
R/W
Error Detect for Flash Key Register
Returns the check result of FKEY value before start of
the erasing processing.
0: FKEY setting is normal (FKEY = H'5A)
1: FKEY setting error (FKEY = value other than H'5A)
R/W
Error Detect for Erase Block Select
Returns the check result whether the specified erase-
block number is in the block range of the user MAT.
0: Setting of erase-block number is normal
1: Setting of erase-block number is abnormal
Advertisement
Table of Contents
