Renesas H8S/2437 Hardware Manual page 36

Section 14 Duty Measurement Circuit
Table 14.1 Pin Configuration.................................................................................................. 401
Table 14.2 Interrupt Sources for Duty Measurement Circuit.................................................. 410
Table 14.3 Switching of Internal Clock and TWCNT Operation ........................................... 412
Table 14.4 Switching of External Event Signal and Operation of Edge Detection Circuit..... 414
Section 15 Watchdog Timer (WDT)
Table 15.1 Interrupt Source .................................................................................................... 422
Section 16 Serial Communication Interface (SCI)
Table 16.1 Pin Configuration.................................................................................................. 427
Table 16.2 Relationships between N Setting in BRR and Bit Rate B..................................... 436
Table 16.3 Examples of BRR Settings for Various Bit Rates (Asynchronous Mode) (1) ...... 437
Table 16.3 Examples of BRR Settings for Various Bit Rates (Asynchronous Mode) (2) ...... 438
Table 16.3 Examples of BRR Settings for Various Bit Rates (Asynchronous Mode) (3) ...... 439
Table 16.4 Maximum Bit Rate for Each Operating Frequency (Asynchronous Mode).......... 440
Table 16.5 Maximum Bit Rate with External Clock Input (Asynchronous Mode) ................ 440
Table 16.6 BRR Settings for Various Bit Rates (Clocked Synchronous Mode)..................... 441
Table 16.7 Maximum Bit Rate with External Clock Input (Clocked Synchronous Mode) .... 441
Table 16.8 Serial Transfer Formats (Asynchronous Mode).................................................... 443
Table 16.9 SSR Status Flags and Receive Data Handling ...................................................... 450
Table 16.10 SCI Interrupt Sources............................................................................................ 468
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Section 17 I C Bus Interface 3 (IIC3)
Table 17.1 Pin Configuration.................................................................................................. 478
Table 17.2 Transfer Rate......................................................................................................... 480
Table 17.3 Interrupt Requests ................................................................................................. 505
Table 17.4 Time for Monitoring SCL..................................................................................... 506
Section 18 A/D Converter
Table 18.1 Pin Configuration.................................................................................................. 509
Table 18.2 Analog Input Channels and Corresponding ADDR.............................................. 510
Table 18.3 A/D Conversion Time (Single Mode)................................................................... 516
Table 18.4 A/D Conversion Time (Scan Mode) ..................................................................... 516
Table 18.5 A/D Converter Interrupt Source............................................................................ 517
Table 18.6 Analog Pin Specifications..................................................................................... 522
Section 20 Flash Memory (0.18-µ µ µ µ m F-ZTAT Version)
Table 20.1 Comparison of Programming Modes.................................................................... 528
Table 20.2 Pin Configuration.................................................................................................. 533
Table 20.3 Registers/Parameters and Target Modes............................................................... 534
Table 20.4 Parameters and Target Modes............................................................................... 542
Table 20.5 Setting On-Board Programming Mode ................................................................. 551
Rev. 1.00, 09/03, page xxxvi of xxxviii