Section 7 I/O Ports - Renesas H8S/2437 Hardware Manual

Section 7 I/O Ports

Table 7.1 is a summary of the port functions. The pins of each port also function as input/output
pins of peripheral modules and interrupt input pins. Each input/output port includes a data
direction register (DDR) that controls input/output, a data register (DR) that stores output data,
and a port register (PORT) that reads a pin state. DDR and DR are not provided for ports 0, 7, and
C.
Ports 1 to 3, and 6, have on-chip input pull-up MOSs. DDR and an pull-up MOS control register
(PCR) can be used to control the on/off status of the input pull-up MOSs.
Port 6 has an on-chip open-drain control register (ODR) that can be used to control the on/off
status of the output buffer PMOS.
Ports 1 to 6, and 9, can drive a single TTL load and 30-pF capacitive load.
All the I/O ports can drive a Darlington transistor in output mode. P80 to P83 and PC0 to PC3 are
NMOS push-pull output.
Rev. 1.00, 09/03, page 131 of 704