Table of Contents
Advertisement
5.2
Input/Output Pins
Table 5.1 shows the pin configuration of the interrupt controller.
Table 5.1
Pin Configuration
Name
NMI
IRQ7 to IRQ0
5.3
Register Descriptions
The interrupt controller has the following registers.
• Interrupt control register (INTCR)
• IRQ sense control register H (ISCR)
• IRQ enable register (IER)
• IRQ status register (ISR)
• Software standby release IRQ enable register (SSIER)
• Interrupt priority register A to K (IPRA to IPRK)
I/O
Function
Input
Nonmaskable external interrupt
Rising or falling edge can be selected.
Input
Maskable external interrupts
Rising, falling, or both edges, or level sensing, can be
selected.
Rev. 1.00, 09/03, page 67 of 704
Advertisement
Table of Contents
