Renesas H8S/2437 Hardware Manual page 601

A single divided block is erased in one erasing processing. For block divisions, see figure 20.4. To
erase two or more blocks, update the erase block number and perform the erasing processing for
each block.
1. Select the on-chip program to be downloaded
Set the EPVB bit in FECS to 1.
Several programming/erasing programs cannot be selected at one time. If several programs are
set, download is not performed and a download error is returned to the SS bit in DPFR.
Specify the start address of a download destination by FTDAR.
The procedures to be carried out after setting FKEY, e.g. download and initialization, are the
same as those in the programming procedure. For details, see section 20.4.2 (2), Programming
Procedure in User Program Mode.
The procedures after setting parameters for erasing programs are as follows:
2. Set FEBS necessary for erasure
Set the erase block number of the user MAT to the flash erase block select parameter FEBS
(general register ER0). If a value other than an erase block number of the user MAT is set, no
block is erased even though the erasing program is executed, and an error is returned to the
return value parameter FPFR.
3. Execute erasing
Similar to as in programming, there is an entry point of the erasing program in the area from
the start address of a download destination specified by FTDAR + 16 bytes of on-chip RAM.
The subroutine should be called and erasing should be executed by using the following steps.
MOV.L #DLTOP+16,ER2
JSR @ER2
NOP
• The general registers other than R0L are retained in the erasing program.
• R0L is a return value of FPFR.
• Since the stack area is used in the erasing program, a stack area of 128 bytes at the
maximum must be saved in RAM.
4. Check the return value in the erasing program, FPFR (general register R0L)
5. Determine whether erasure of the necessary blocks has completed
If several blocks need to be erased, update FEBS and repeat steps 2 to 5. Blocks that have
already been erased can be erased again.
6. After erasure completes, clear FKEY and specify software protection
If this LSI is restarted by a reset immediately after user MAT erasure has completed, secure
the reset period (period of RES = 0) of at least 100 µs which is longer than normal.
; Set entry address to ER2
; Call erasing routine
Rev. 1.00, 09/03, page 563 of 704