Table of Contents
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1.1
Features
• High-speed H8S/2600 central processing unit with an internal 16-bit architecture
Upward-compatible with H8/300 and H8/300H CPUs on an object level
Sixteen 16-bit general registers
69 basic instructions
Multiply-and-accumulate instruction
• Various peripheral functions
8-bit PWM timer (PWM)
14-bit PWM timer (PWMX)
16-bit free-running timer (FRT)
8-bit timer (TMR)
16-bit timer pulse unit (TPU)
Watchdog timer (WDT)
Timer connection
Duty measurement circuit
Asynchronous or clocked synchronous serial communication interface (SCI)
2
I
C bus interface 3 (IIC3)
10-bit A/D converter
• On-chip memory
ROM Type
Model
Flash memory
HD64F2437
version
• General I/O ports
I/O pins: 94
Input-only pins: 16
• Supports various power-down modes
• Compact package
Package
QFP-128
Section 1 Overview
ROM
256 kbytes
Code
FP-128B
RAM
16 kbytes
Body Size
14.0 × 20.0 mm
Rev. 1.00, 09/03, page 1 of 704
Remarks
Pin Pitch
0.5 mm
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