Table 20.4 Parameters And Target Modes - Renesas H8S/2437 Hardware Manual

Renesas 16-bit single-chip microcomputer h8s family / h8s / 2600 series
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Table 20.4 Parameters and Target Modes

Name of
Abbrevia-
Parameter
tion
Download
DPFR
pass/fail result
Flash pass/fail
FPFR
result
Flash
FPEFEQ
programming/
erasing frequency
control
Flash multi-
FMPAR
purpose address
area
Flash multi-
FMPDR
purpose data
destination area
Flash erase block
FEBS
select
Note:
* A single byte of the start address to download an on-chip program, which is specified by
FTDAR
(1) Download Control
The on-chip program is automatically downloaded by setting the SCO bit to 1. The on-chip RAM
area to be downloaded is the 2-kbyte area starting from the address specified by FTDAR.
Download control is set by the programming/erasing interface registers, and DPFR indicates the
return value.
(a) Download Pass/Fail Result Parameter (DPFR: Single Byte of On-Chip RAM Start Address
Specified by FTDAR)
DPFR indicates the return value of the download result. The value of this parameter can be used to
determine if downloading is executed or not. Since the confirmation whether the SCO bit is set to
1 is difficult, the certain determination must be performed by setting the single byte of the start
address specified by FTDAR to the value other than the return value of download (for example,
H'FF) before the download start (before setting the SCO bit to 1).
Rev. 1.00, 09/03, page 542 of 704
Down-
Initializa-
Program-
load
tion
ming
Initial
Erasure
R/W
Value
R/W
Undefined
R/W
Undefined
R/W
Undefined
R/W
Undefined
R/W
Undefined
R/W
Undefined
Alloca-
tion
On-chip
RAM*
R0L of
CPU
ER0 of
CPU
ER1 of
CPU
ER0 of
CPU
R0L of
CPU

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