Figure 16.1 shows a block diagram of the SCI.
RxD
TxD
SCK
[Legend]
RSR:
RDR:
TSR:
TDR:
SMR:
Rev. 1.00, 09/03, page 426 of 704
Module data bus
RDR
TDR
RSR
TSR
Parity generation
Parity check
Receive shift register
Receive data register
Transmit shift register
Transmit data register
Serial mode register
Figure 16.1 Block Diagram of SCI
SCMR
BRR
SSR
SCR
Baud rate
generator
SMR
Transmission/
reception control
Clock
External clock
SCR:
Serial control register
SSR:
Serial status register
SCMR: Serial interface mode register
BRR:
Bit rate register
φ
φ/4
φ/16
φ/64
TEI
TXI
RXI
ERI