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Bit
Bit Name
4
ICST
3
HFINV
2
VFINV
Rev. 1.00, 09/03, page 370 of 704
Initial Value
R/W
0
R/W
0
R/W
0
R/W
Description
Input Capture Start Bit
The TMRX external reset input (TMRIX) is
connected to the IHI signal. The TMRX has input
capture registers (TICR, TICRR, and TICRF). TICRR
and TICRF can measure the width of a short pulse
by means of a single capture operation under the
control of the ICST bit. When a rising edge followed
by a falling edge is detected on the TMRIX after the
ICST bit is set to 1, the contents of TCNT at those
points are captured into TICRR and TICRF,
respectively, and the ICST bit is cleared to 0.
0: Input capture function of TICRR and TICRF is
halted
[Clearing condition]
When a rising edge followed by a falling edge is
detected on TMRIX
1: Input capture function of TICRR and TICRF is
operating (Waiting for the time when a rising edge
followed by a falling edge is detected on TMRIX)
[Setting condition]
When 1 is written to ICST after reading ICST = 0
Spare Horizontal Synchronization Signal Inversion
Selects inversion of the input phase of the spare
horizontal synchronization signal (HFBACKI). This
bit is reserved in channel 1. The initial value should
not be changed.
0: The HFBACKI pin state is used directly as the
HFBACKI input
1: The HFBACKI pin state is inverted before use as
the HFBACKI input
Spare Vertical Synchronization Signal Inversion
Selects inversion of the input phase of the spare
vertical synchronization signal (VFBACKI). This bit is
reserved in channel 1. The initial value should not be
changed.
0: The VFBACKI pin state is used directly as the
VFBACKI input
1: The VFBACKI pin state is inverted before use as
the VFBACKI input
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