Operation; Pwm Decoding (Pdc Signal Generation); Figure 13.3 Block Diagram For Pwm Decoding - Renesas H8S/2437 Hardware Manual

Renesas 16-bit single-chip microcomputer h8s family / h8s / 2600 series
Table of Contents

Advertisement

13.4

Operation

13.4.1

PWM Decoding (PDC Signal Generation)

The timer connection and TMRX can be used to decode a PWM signal in which 0 and 1 are
represented by the pulse width. To do this, a signal in which a rising edge is generated at regular
intervals must be selected as the IHI signal.
The timer counter (TCNT) in the TMRX is set to count the internal clock pulses and to be cleared
on the rising edge of the external reset signal (IHI signal). The value to be used as the threshold for
deciding the pulse width is written to TCORB. The PWM decoder contains a delay latch which
uses the IHI signal as data and compare-match signal B (CMB) as a clock, and the state of the IHI
signal (the result of the pulse width decision) at the first compare-match signal B timing after the
TCNT is reset by the rise of the IHI signal is output as the PDC signal. Figure 13.3 shows a block
diagram for the PWM decoding.
The pulse width setting using TICRR and TICRF of the TMRX can be used to determine the pulse
width decision threshold.
Examples of TCR and TCORB settings of the TMRX are shown in tables 13.5 and 13.6, and the
PWM decoding timing chart is shown in figure 13.4.
Rev. 1.00, 09/03, page 380 of 704
IHI signal
PWM decoder
PDC signal

Figure 13.3 Block Diagram for PWM Decoding

Internal clock
Clock
TCNT
Clear
Comparator B
CMB
TCORB
TMRX

Advertisement

Table of Contents
loading

Table of Contents