HSYNCI_0
HSYNCI_1
CSYNCI_0
CSYNCI_1
HFBACKI_0
HFBACKI_1
VSYNCI_0
VSYNCI_1
[Legend]
TWCNT:
Free-running counter
TWICR:
Input capture register
TWCR1:
Duty measurement control register 1
TWCR2:
Duty measurement control register 2
Figure 14.1 Block Diagram of Duty Measurement Circuit
Rev. 1.00, 09/03, page 400 of 704
Clock selection
Control logic
Edge
detector
/2
/4
/8
/32
/2048
/32768
/65536
Clock
Overflow
Clear
TWCNT
Input capture
TWICR
TWCR1
TWCR2
Interrupt signal
TWOVI
TWENDI
Internal
data bus