ADSP-SC58x USB Register Descriptions
VBUS Pulse Length Register
The
register defines the duration of the VBUS pulsing charge for SRP initiation.
USB_VPLEN
Figure 27-118: USB_VPLEN Register Diagram
Table 27-94: USB_VPLEN Register Fields
Bit No.
(Access)
7:0
VALUE
(R/W)
27–228
VALUE (R/W)
VBUS Pulse Length Value
Bit Name
VBUS Pulse Length Value.
The USB_VPLEN.VALUE bits sets the duration of the VBUS pulsing charge in units
of 546.1us. The default setting corresponds to 32.77ms. Note that VBUS pulsing was
removed in the OTG specification v2.0, section 5.1.4.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
7
6
5
4
3
2
1
0
0
0
1
1
1
1
0
0
Description/Enumeration
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