Analog Devices ADSP-SC58 Series Hardware Reference Manual page 1636

Sharc+ processor
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ADSP-SC58x USB Register Descriptions
Transmit FIFO Address Register
The
USB_TXFIFOADDR
transmit FIFO address register for each endpoint, except endpoint 0. The
and selected by the
USB_INDEX
located at address 0.
Figure 27-115: USB_TXFIFOADDR Register Diagram
Table 27-91: USB_TXFIFOADDR Register Fields
Bit No.
(Access)
12:0
VALUE
(R/W)
27–224
register sets the start address for the selected Tx FIFO for endpoints 1-11. There is one
register. Note that the endpoint 0 FIFO has a fixed 64-byte size and is always
15
14
13
0
0
0
VALUE (R/W)
Tx FIFO Start Address
Bit Name
Tx FIFO Start Address.
The USB_TXFIFOADDR.VALUE bits hold the start address of the selected endpoint
FIFO (selected with the
formula:
FIFO address = USB_TXFIFOADDR.VALUE * 8
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
USB_TXFIFOADDR
12
11
10
9
8
7
6
5
0
0
0
0
0
0
0
0
Description/Enumeration
USB_INDEX
register is indexed
4
3
2
1
0
0
0
0
0
0
register) in units of 8 bytes, according to the

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