Analog Devices ADSP-SC58 Series Hardware Reference Manual page 1609

LPM Control Register
The register controls link power management (LPM) operations, including LPM enable, NAK,
USB_LPM_CTL
resume, and mode transition.
Figure 27-95: USB_LPM_CTL Register Diagram
Table 27-71: USB_LPM_CTL Register Fields
Bit No.
(Access)
4 NAK
(R/W)
3:2 EN
(R/W)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
7 6 5 4
0 0 0 0
NAK (R/W)
LPM NAK Enable
EN (R/W)
LPM Enable
Bit Name
LPM NAK Enable.
The USB_LPM_CTL.NAK bit enables (in peripheral mode) a NAK-all-non-LPM
transactions mode for all end points, forcing a NAK response to all transactions other
than an LPM transaction. This bit only takes effect after the controller has been LPM
suspended. In this case, the USB controller continues to NAK, until this bit has been
cleared by software.
LPM Enable.
The USB_LPM_CTL.EN bits enable (In peripheral mode) LPM operations. The
LPM operation may be enabled at different levels, which determine the response of the
USB controller to LPM transactions.
3 2 1 0
0 0 0 0
TX (R/W)
LPM Transmit
RESUME (R/W)
LPM Resume (Remote Wakeup)
Description/Enumeration
0 Disable LPM NAK
1 Enable LPM NAK
0 Disable LPM. LPM and extended transactions are not
supported. The USB controller does not respond to
LPM transactions, and these transaction timeout.
1 Disable LPM. LPM and extended transactions are not
supported. The USB controller does not respond to
LPM transactions, and these transaction timeout.
2 Enable Extended Transactions. LPM is not supported,
but extended transactions are supported. The USB con-
troller responds to an LPM transaction with a STALL.
3 Enable LPM and Extended Transactions. Both LPM
and extended transactions are supported. The USB con-
troller responds with a NYET or an ACK as determined
by the value of LPMXMT and other conditions.
ADSP-SC58x USB Register Descriptions
27–197