Analog Devices ADSP-SC58 Series Hardware Reference Manual page 1681

HBI Channel Error 0 Register
The register indicates which channels (channels 31:0) have encountered fatal errors.
MLB_HCER0
CERR[31:16] (R/W0C)
Channel Error
Figure 28-17: MLB_HCER0 Register Diagram
Table 28-30: MLB_HCER0 Register Fields
Bit No.
(Access)
31:0 CERR
(R/W0C)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
15
0
CERR[15:0] (R/W0C)
Channel Error
31
0
Bit Name
Channel Error.
The MLB_HCER0.CERR bit field reports bitwise errors for channels 31:0.
14 13 12 11 10 9 8 7
0 0 0 0 0 0 0 0
30 29 28 27 26 25 24 23
0 0 0 0 0 0 0 0
Description/Enumeration
ADSP-SC58x MLB Register Descriptions
6 5 4 3 2 1 0
0 0 0 0 0 0 0
22 21 20 19 18 17 16
0 0 0 0 0 0 0
28–41