ADSP-SC58x USB Register Descriptions
LPM Attribute Register
The
USB_LPM_ATTR
sleep/wake operation. In peripheral mode, the
cent, accepted (ACK'd) LPM transaction. In host mode, the
software) that set up the next LPM transaction. The USB controller inserts the LPM values within the next LPM
transaction.
EP (R/W)
Endpoint
RMTWAK (R/W)
Remote Wakeup Enable
Figure 27-94: USB_LPM_ATTR Register Diagram
Table 27-70: USB_LPM_ATTR Register Fields
Bit No.
(Access)
15:12
EP
(R/W)
8
RMTWAK
(R/W)
7:4
HIRD
(R/W)
3:0
LINKSTATE
(R/W)
27–196
register defines the link power management (LPM) attributes for LPM transactions and
USB_LPM_ATTR
15
14
13
12
11
10
9
8
0
0
0
0
0
0
0
0
Bit Name
Endpoint.
The USB_LPM_ATTR.EP bits select the endpoint in the token packet of the LPM
transaction.
Remote Wakeup Enable.
The USB_LPM_ATTR.RMTWAK bit enables remote wakeup. This bit is applied on a
temporary basis only and is only applied to the current suspend state. After the current
suspend cycle, the remote wakeup capability that was negotiated during enumeration
applies.
Host Initiated Resume Duration.
The USB_LPM_ATTR.HIRD bits select the host-initiated resume duration. This val-
ue is the minimum time that the host drives resume on the bus. The value in this regis-
ter corresponds to an actual resume time of:
Resume Time = 50us + HIRD*75us.
This equation produces results in a range of 50us to 1200us.
Link State.
The USB_LPM_ATTR.LINKSTATE bits is value is provided by the host to the pe-
ripheral to indicate what state the peripheral must transition to after the receipt and
acceptance of a LPM transaction. (Enumerations not shown are reserved.)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
register contains values received in the most re-
USB_LPM_ATTR
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
Description/Enumeration
0 Disable Remote Wakeup
1 Enable Remote Wakeup
1 Sleep State (L1)
register contains values (loaded by
LINKSTATE (R/W)
Link State
HIRD (R/W)
Host Initiated Resume Duration
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