Analog Devices ADSP-SC58 Series Hardware Reference Manual page 1602

ADSP-SC58x USB Register Descriptions
Transmit Interrupt Enable Register
The register enables interrupts for endpoint 0 and the transmit (Tx) endpoints. Enabling an inter-
USB_INTRTXE
rupt in this register directs the USB controller to generate an interrupt if the corresponding interrupt pending bit in
the USB_INTRTX register is set.
EP11 (R/W)
Endpoint 11 Tx Interrupt Enable
EP10 (R/W)
Endpoint 10 Tx Interrupt Enable
EP9 (R/W)
Endpoint 9 Tx Interrupt Enable
EP8 (R/W)
Endpoint 8 Tx Interrupt Enable
EP7 (R/W)
Endpoint 7 Tx Interrupt Enable
EP6 (R/W)
Endpoint 6 Tx Interrupt Enable
Figure 27-91: USB_INTRTXE Register Diagram
Table 27-67: USB_INTRTXE Register Fields
Bit No.
(Access)
11 EP11
(R/W)
10 EP10
(R/W)
9 EP9
(R/W)
27–190
15 14 13 12 11 10 9 8
0 0 0 0 1 1 1 1
Bit Name
Endpoint 11 Tx Interrupt Enable.
The USB_INTRTXE.EP11 bit enables the transmit interrupt for this endpoint.
Endpoint 10 Tx Interrupt Enable.
The USB_INTRTXE.EP10 bit enables the transmit interrupt for this endpoint.
Endpoint 9 Tx Interrupt Enable.
The USB_INTRTXE.EP9 bit enables the transmit interrupt for this endpoint.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
7 6 5 4 3 2 1 0
1 1 1 1 1 1 1 1
Description/Enumeration
0 Disable Interrupt
1 Enable Interrupt
0 Disable Interrupt
1 Enable Interrupt
0 Disable Interrupt
1 Enable Interrupt
EP0 (R/W)
Endpoint 0 Tx Interrupt Enable
EP1 (R/W)
Endpoint 1 Tx Interrupt Enable
EP2 (R/W)
Endpoint 2 Tx Interrupt Enable
EP3 (R/W)
Endpoint 3 Tx Interrupt Enable
EP4 (R/W)
Endpoint 4 Tx Interrupt Enable
EP5 (R/W)
Endpoint 5 Tx Interrupt Enable