Analog Devices ADSP-SC58 Series Hardware Reference Manual page 1685

HBI Control Register
The register controls and monitors general operation of the HBI block through the Address Generation
MLB_HCTL
Units) by reading and writing the register through the I/O interface. Each bit of this register is read/write.
EN (R/W)
HBI Enable
RST1 (R/W)
AGU1 Software Reset
Figure 28-21: MLB_HCTL Register Diagram
Table 28-34: MLB_HCTL Register Fields
Bit No.
(Access)
15 EN
(R/W)
1 RST1
(R/W)
0 RST0
(R/W)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
15 14 13 12 11 10 9
0 0 0 0 0 0 0
31 30 29 28 27 26 25
0 0 0 0 0 0 0
Bit Name
HBI Enable.
Setting the MLB_HCTL.EN bit enables the HBI.
AGU1 Software Reset.
Setting the MLB_HCTL.RST1 bit resets AGU1.
AGU0 Software Reset.
Setting the MLB_HCTL.RST0 bit resets AGU0.
8 7 6 5 4 3 2 1
0 0 0 0 0 0 0 0
24 23 22 21 20 19 18 17
0 0 0 0 0 0 0 0
Description/Enumeration
ADSP-SC58x MLB Register Descriptions
0
0
RST0 (R/W)
AGU0 Software Reset
16
0
28–45