Analog Devices ADSP-SC58 Series Hardware Reference Manual page 1614

ADSP-SC58x USB Register Descriptions
LPM Interrupt Status Register
The register indicates link power management (LPM) related interrupt status. The USB controller
USB_LPM_IRQ
clears this register when it is read.
Figure 27-98: USB_LPM_IRQ Register Diagram
Table 27-74: USB_LPM_IRQ Register Fields
Bit No.
(Access)
5 LPMERR
(RC/NW)
4 LPMRES
(RC/NW)
27–202
7 6
0 0
LPMERR (RC)
LPM Error Interrupt
LPMRES (RC)
LPM Resume Interrupt
LPMNC (RC)
LPM NYET Control Interrupt
Bit Name
LPM Error Interrupt.
The USB_LPM_IRQ.LPMERR bit indicates an LPM error interrupt condition. This
interrupt has differing conditions for host mode versus peripheral mode.
In peripheral mode, this bit is set if an LPM transaction is received that has a
USB_LPM_ATTR.LINKSTATE field that is not supported. The USB controller re-
sponds to the transaction with a STALL. Note that the USB controller updates the
USB_LPM_ATTR
payload.
In host mode, this bit is set if the response to a LPM transaction is received with a bit
stuff or PID error. No suspend occurs and the state of the device is now unknown.
LPM Resume Interrupt.
The USB_LPM_IRQ.LPMRES bit indicates that the USB controller has been re-
sumed for any reason. This bit is mutually exclusive from the USB_POWER.RESUME
bit.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
5 4 3 2 1 0
0 0 0 0 0 0
LPMST (RC)
LPM STALL Interrupt
LPMNY (RC)
LPM NYET Interrupt
LPMACK (RC)
LPM ACK Interrupt
Description/Enumeration
register, so software can observe the non-compliant LPM packet
0 No Interrupt Pending
1 Interrupt Pending
0 No Interrupt Pending
1 Interrupt Pending